The present invention relates to a power clipping circuit used in a baseband signal unit in a base station and the like using a W-CDMA (Wideband-Code Division Multiple Access) radio communications system. In a case of radio transmission apparatuses, including mobile phones, of a radio communication system, it is considered beneficial for a power amplifier used in a linear digital modulation circuit to have excellent linearity and high efficiency characteristics with regard to an amplitude of a transmitted signal. However, using a power amplifier with excellent linearity for every transmitted signal has disadvantages such as an accompanying increase in a circuit size, cost, power consumption and the like. For this reason, the amplifier which is typically used in the field is as follows. Although power amplifiers actually in use can maintain the linearity to a certain level, the power amplifiers can not maintain the linearity beyond the certain level, and therefore, can output nonlinear signals.
In a case where a communications method in which a plurality of transmission carriers are multiplexed together, such as CDMA (Code Division Multiple Access) and OFDM (Orthogonal Frequency Division Multiplex), post-multiplexed signals have large peak power. As a result of an amplification of signals with that large peak power by using a nonlinear power amplifier, nonlinear distortion occurs. This causes out-band radiation to occur. Thus, inter-channel interference deteriorates modulation precision. As a result, an error-ratio characteristic is deteriorated.
With this taken into consideration, a clipping circuit for suppressing peak powers respectively of common-mode signals (I) and orthogonal signals (Q) in a baseband signal unit has been proposed as a method of avoiding occurrence of nonlinear output signals in a power amplifier (for example, Japanese Patent Laid-open Patent No. 2004-032450, Japanese Patent Laid-open Patent No. 2004-349941). Typical examples of the clipping circuit are square clipping and circle clipping.
The square clipping process can be realized in a circuit with a very small size. However, the square clipping process applies the clipping process separately to an I signal and a Q signal. For this reason, in a case where one of the two signals does not exceed a clip level, the clipping process is applied to the other signal only. Accordingly, phase errors occur respectively in the I signal and the Q signal. These phase errors deteriorate modulation precision in their respective modulated waves and error-ratio characteristics as well.
On the other hand, in the case of the circle clipping process, the clipping process is applied to both the I signal and the Q signal along their respective phases. For this reason, the circle clipping process brings about an advantage that the phase error, which is a problem with the square clipping process, does not occur in the circle clipping process. However, the circle clipping process increases amounts of arithmetic process, data-read process and the like in conjunction with increase in the number of bits of each of the I and Q signals. Accordingly, this enlarges the circuit size, and increases power consumption.
In addition, the polygon clipping process has been known besides the square clipping process and the circle clipping process. FIG. 1 is a block diagram showing a configuration of a conventional hexadecagon clipping circuit. This hexadecagon clipping circuit is configured of a square clipping circuit 301, a phase rotation circuit 302, a square clipping circuit 303, a phase rotation circuit 304, a square clipping circuit 305, a phase rotation circuit 306, a square clipping circuit 307, a phase rotation circuit 308, and a amplitude scaling circuit 309. The square clipping circuit 301 applies a square clipping process to each of received I and Q signals with a clip level RL. The phase rotation circuit 302 rotates the phases respectively of the I and Q signals, to which the square clipping process has been applied by the square clipping circuit 301, by +π/4. The square clipping circuit 303 applies a square clipping process to the I and Q signals, whose phases have been rotated by +π/4, with a clip level RL×(2)1/2. The phase rotation circuit 304 rotates the phases respectively of the I and Q signals, to which the clipping process has been applied by the square clipping circuit 303, by −π/8. The square clipping circuit 305 applies a square clipping process to the I and Q signals, whose phases have been rotated by −π/8, with a clip level RL×2×{2−(2)1/2}1/2. The phase rotation circuit 306 rotates the phases respectively of the I and Q signals, to which the clipping process has been applied by the square clipping circuit 305, by −π/4. The square clipping circuit 307 applies a square clipping process to the I and Q signals, whose phases have been rotated by −π/4, with a clip level RL×2×(2)1/2×{2−(2)1/2}1/2. The phase rotation circuit 308 rotates the phases respectively of the I and Q signals, to which the clipping process has been applied by the square clipping circuit 307, by +π/8. The amplitude scaling circuit 309 adjusts the amplitudes respectively of the I and Q signals whose phases have been rotated by +π/8, and outputs the resultant signals.
As described above, the conventional square clipping process has a problem in that the phase errors occur respectively in the I and Q signals.
In addition, the circle clipping process has a problem in that the circuit size is enlarged and power consumption is increased.
Furthermore, in the case of the polygon clipping process, a plurality of basic circuit modules each constituted of square clipping circuits and phase rotation circuits need to be connected to one another in series. For this reason, the polygon clipping process has a disadvantage in that the circuit size is large. In particular, each of triacontakaidigon clipping and hexacontakaitetragon clipping needs a large number of basic circuits. Accordingly, increase in circuit size is more significant.